Japanese Patent Application Laid-Open Publication No. 2005-183790 (Patent Document 1) and Japanese Patent Application Laid-Open Publication No. 2005-294528 (Patent Document 2) describe that a ground pattern and a wiring pattern are stacked with an insulating layer interposed therebetween, and high frequency noise is reduced by a layout of the ground pattern. Also, Japanese Patent Application Laid-Open Publication No. 2009-21747 (Patent Document 3) describes such a configuration that a bandpass filter provided with an impedance matching circuit includes a plurality of open stubs connected to a coplanar line, and a capacitor provided on an input-end side.